For high density recording or the like in the storage field of semiconductor memories and the like, development related to digital data error correcting codes is underway. The error correcting codes can be roughly divided into an error correcting scheme based on an algebraic system and an error correcting scheme using iterative calculation based on probability. Low density parity check codes (hereinafter referred to as “LDPC codes”) that belong to the latter are reported to have excellent performance nearing a Shannon limit. LDPC-coded data can be subjected to parallel processing with a relatively small circuit scale by using a sum-product algorithm.
Application of the LDPC codes to semiconductor memory apparatuses and the like has been advancing, and a more efficient error detection correction method is required.